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FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET December 2009 FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET N-Channel: 30 V, 30 A, 7.5 m N-Channel: 30 V, 40 A, 2.8 m Features Q1: N-Channel Max rDS(on) = 7.5 m at VGS = 10 V, ID = 12 A Max rDS(on) = 12 m at VGS = 4.5 V, ID = 10 A Q2: N-Channel Max rDS(on) = 2.8 m at VGS = 10 V, ID = 20 A Max rDS(on) = 3.3 m at VGS = 4.5 V, ID = 18 A RoHS Compliant General Description This device includes two specialized N-Channel MOSFETs in a dual MLP package.The switch node has been internally connected to enable easy placement and routing of synchronous buck converters. The control MOSFET (Q1) and synchronous SyncFET (Q2) have been designed to provide optimal power efficiency. Applications Computing Communications General Purpose Point of Load Notebook VCORE S2 S1/D2 D1 D1 Top Power 56 D1 D1 S2 S2 G2 S2 S2 S2 5 6 7 8 Q2 4 D1 3 D1 2 D1 Q1 G1 Bottom G2 1 G1 MOSFET Maximum Ratings TA = 25 C unless otherwise noted Symbol VDS VGS Parameter Drain to Source Voltage Gate to Source Voltage Drain Current ID -Continuous (Package limited) -Continuous (Silicon limited) -Continuous -Pulsed PD TJ, TSTG Power Dissipation for Single Operation Operating and Storage Junction Temperature Range TA = 25 C TA = 25 C (Note 3) TC = 25 C TC = 25 C TA = 25 C Q1 30 20 30 50 121a 40 2.21a 1.01c Q2 30 20 40 120 221b 60 2.51b 1.01d W C A Units V V -55 to +150 Thermal Characteristics RJA RJA RJC Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Ambient Thermal Resistance, Junction to Case 571a 1251c 3.5 501b 1201d 2 C/W Package Marking and Ordering Information Device Marking FDMS7600AS Device FDMS7600AS Package Power 56 Reel Size 13 " Tape Width 12 mm Quantity 3000 units (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 1 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Off Characteristics BVDSS BVDSS TJ IDSS IGSS Drain to Source Breakdown Voltage Breakdown Voltage Temperature Coefficient Zero Gate Voltage Drain Current Gate to Source Leakage Current ID = 250 A, VGS = 0 V ID = 1 mA, VGS = 0 V ID = 250 A, referenced to 25 C ID = 1 mA, referenced to 25 C VDS = 24 V, VGS = 0 V VGS = 20 V, VDS= 0 V Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 30 30 15 18 1 500 100 100 V mV/C A A nA nA On Characteristics VGS(th) VGS(th) TJ Gate to Source Threshold Voltage Gate to Source Threshold Voltage Temperature Coefficient VGS = VDS, ID = 250 A VGS = VDS, ID = 1 mA ID = 250 A, referenced to 25 C ID = 1 mA, referenced to 25 C VGS = 10 V, ID = 12 A VGS = 4.5 V, ID = 10 A VGS = 10 V, ID = 12 A , TJ = 125 C VGS = 10 V, ID = 20 A VGS = 4.5 V, ID = 18 A VGS = 10 V, ID = 20 A , TJ = 125 C VDS = 5 V, ID = 12 A VDS = 5 V, ID = 20 A Q1 Q2 Q1 Q2 Q1 1 1 1.8 1.5 -6 -5 6.0 8.5 8.3 2.2 2.6 2.6 63 190 7.5 12 12 2.8 3.3 3.8 3 3 V mV/C rDS(on) Drain to Source On Resistance m Q2 Q1 Q2 gFS Forward Transconductance S Dynamic Characteristics Ciss Coss Crss Rg Input Capacitance Output Capacitance Reverse Transfer Capacitance Gate Resistance Q1: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q2: VDS = 15 V, VGS = 0 V, f = 1 MHZ Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 1315 5265 445 2150 45 200 0.9 0.3 1750 7005 600 2860 70 300 pF pF pF Switching Characteristics td(on) tr td(off) tf Qg Qg Qgs Qgd Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge Total Gate Charge Gate to Source Gate Charge Gate to Drain "Miller" Charge Q1: VDD = 15 V, ID = 12 A, VGS = 10 V, RGEN = 6 Q2: VDD = 15 V, ID = 20 A, VGS = 10 V, RGEN = 6 VGS = 0 V to 10 V Q1 VDD = 15 V, VGS = 0 V to 4.5 V ID = 12 A Q2 VDD = 15 V, ID = 20 A Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 Q1 Q2 8.6 18 2.5 7.6 20 45 2.3 5.2 20 81 9.3 37 4.3 13 2.2 9.6 18 32 10 16 32 72 10 10 28 113 13 52 ns ns ns ns nC nC nC nC (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 2 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Electrical Characteristics TJ = 25 C unless otherwise noted Symbol Parameter Test Conditions Type Min Typ Max Units Drain-Source Diode Characteristics VSD trr Qrr Source to Drain Diode Forward Voltage Reverse Recovery Time Reverse Recovery Charge VGS = 0 V, IS = 12 A VGS = 0 V, IS = 20 A Q1 IF = 12 A, di/dt = 100 A/s Q2 IF = 20 A, di/dt = 300 A/s (Note 2) (Note 2) Q1 Q2 Q1 Q2 Q1 Q2 0.8 0.7 27 47 10 80 1.2 1.2 43 75 18 128 V ns nC Notes: 1: RJA is determined with the device mounted on a 1 in2 pad 2 oz copper pad on a 1.5 x 1.5 in. board of FR-4 material. RJC is guaranteed by design while RCA is determined by the user's board design. a. 57 C/W when mounted on a 1 in2 pad of 2 oz copper b. 50 C/W when mounted on a 1 in2 pad of 2 oz copper c. 125 C/W when mounted on a minimum pad of 2 oz copper d. 120 C/W when mounted on a minimum pad of 2 oz copper 2: Pulse Test: Pulse Width < 300 s, Duty cycle < 2.0%. 3: As an N-ch device, the negative Vgs rating is for low duty cycle pulse ocurrence only. No continuous rating is implied. (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 3 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25 C unless otherwise noted 40 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE VGS = 10 V 4 VGS = 6 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX ID, DRAIN CURRENT (A) 30 VGS = 4.5 V VGS = 4 V 3 VGS = 3.5 V VGS = 4 V 20 2 VGS = 4.5 V 10 VGS = 3.5 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 1 VGS = 6 V 0 0 10 20 ID, DRAIN CURRENT (A) 30 VGS = 10 V 0 0.0 0.5 1.0 1.5 VDS, DRAIN TO SOURCE VOLTAGE (V) 2.0 40 Figure 1. On Region Characteristics Figure 2. Normalized On-Resistance vs Drain Current and Gate Voltage 40 SOURCE ON-RESISTANCE (m) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE ID = 12 A VGS = 10 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX rDS(on), DRAIN TO 1.4 30 ID = 12 A 1.2 20 TJ = 125 oC 1.0 10 TJ = 25 oC 0.8 -75 0 -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 3. Normalized On Resistance vs Junction Temperature 40 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX Figure 4. On-Resistance vs Gate to Source Voltage 40 VGS = 0 V 10 ID, DRAIN CURRENT (A) 30 VDS = 5 V TJ = 150 oC TJ = 25 oC 1 TJ = 150 oC TJ = 25 oC 20 0.1 10 TJ = -55 oC 0.01 TJ = -55 oC 0 1.5 2.0 2.5 3.0 3.5 4.0 0.001 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 5. Transfer Characteristics Figure 6. Source to Drain Diode Forward Voltage vs Source Current (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 4 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25 C unless otherwise noted 10 VGS, GATE TO SOURCE VOLTAGE (V) ID = 12 A 2000 1000 Ciss 8 6 VDD = 15 V CAPACITANCE (pF) VDD = 10 V Coss 4 VDD = 20 V 100 2 0 0 5 10 Qg, GATE CHARGE (nC) Crss f = 1 MHz VGS = 0 V 15 20 10 0.1 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 7. Gate Charge Characteristics Figure 8. Capacitance vs Drain to Source Voltage 100 60 VGS = 10 V RJC = 3.5 C/W ID, DRAIN CURRENT (A) o ID, DRAIN CURRENT (A) 100us 10 1 ms 40 VGS = 4.5 V 1 THIS AREA IS LIMITED BY rDS(on) 10 ms 100 ms 20 Limited by Package 0.1 SINGLE PULSE TJ = MAX RATED RJA = 125 oC/W TA = 25 oC 1s 10s DC 1 10 100 200 0 25 50 75 100 o 125 150 0.01 0.01 0.1 TC, CASE TEMPERATURE ( C) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 9. Maximum Continuous Drain Current vs Case Temperature 1000 P(PK), PEAK TRANSIENT POWER (W) Figure 10. Forward Bias Safe Operating Area SINGLE PULSE RJA = 125 C/W o o 100 TA = 25 C 10 1 0.5 -4 10 10 -3 10 -2 10 -1 1 10 100 1000 t, PULSE WIDTH (s) Figure 11. Single Pulse Maximum Power Dissipation (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 5 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q1 N-Channel) TJ = 25 C unless otherwise noted 2 1 NORMALIZED THERMAL IMPEDANCE, ZJA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM 0.01 t1 SINGLE PULSE RJA = 125 C/W (Note 1c) o t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA -1 0.001 -4 10 10 -3 10 -2 10 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure 12. Junction-to-Ambient Transient Thermal Response Curve (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 6 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 N-Channel) TJ = 60 VGS = 10 V 25 oC unlenss otherwise noted 3 VGS = 6 V ID, DRAIN CURRENT (A) NORMALIZED DRAIN TO SOURCE ON-RESISTANCE PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX VGS = 3 V 40 VGS = 4.5 V VGS = 3.5 V 2 VGS = 3.5 V VGS = 4.5 V 20 VGS = 3 V PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 1 VGS = 6 V VGS = 10 V 0 0.0 0 0 20 ID, DRAIN CURRENT (A) 0.1 0.2 0.3 VDS, DRAIN TO SOURCE VOLTAGE (V) 0.4 40 60 Figure 13. On-Region Characteristics Figure 14. Normalized on-Resistance vs Drain Current and Gate Voltage 10 SOURCE ON-RESISTANCE (m) 1.6 NORMALIZED DRAIN TO SOURCE ON-RESISTANCE 1.4 1.2 1.0 0.8 0.6 -75 ID = 20 A VGS = 10 V rDS(on), DRAIN TO PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 8 ID = 20 A 6 4 2 TJ = 25 oC TJ = 125 oC -50 -25 0 25 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (oC) 0 2 4 6 8 10 VGS, GATE TO SOURCE VOLTAGE (V) Figure 15. Normalized On-Resistance vs Junction Temperature Figure 16. On-Resistance vs Gate to Source Voltage 60 IS, REVERSE DRAIN CURRENT (A) PULSE DURATION = 80 s DUTY CYCLE = 0.5% MAX 60 VGS = 0 V ID, DRAIN CURRENT (A) VDS = 5 V 10 TJ = 125 oC 40 TJ = 125 oC 1 TJ = 25 oC 20 TJ = 25 oC TJ = -55 oC 0.1 TJ = -55 oC 0 1.0 1.5 2.0 2.5 3.0 0.01 0.0 0.2 0.4 0.6 0.8 1.0 1.2 VGS, GATE TO SOURCE VOLTAGE (V) VSD, BODY DIODE FORWARD VOLTAGE (V) Figure 17. Transfer Characteristics Figure 18. Source to Drain Diode Forward Voltage vs Source Current (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 7 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 N-Channel) TJ = 25 oC unless otherwise noted 10 VGS, GATE TO SOURCE VOLTAGE (V) ID = 20A 10000 Ciss VDD = 10 V 8 6 VDD = 15 V CAPACITANCE (pF) Coss 1000 4 VDD = 20 V 2 f = 1 MHz VGS = 0 V Crss 0 0 30 60 90 Qg, GATE CHARGE (nC) 100 0.1 1 10 30 VDS, DRAIN TO SOURCE VOLTAGE (V) Figure 19. Gate Charge Characteristics Figure 20. Capacitance vs Drain to Source Voltage 100 150 VGS = 10 V RJC = 2 C/W ID, DRAIN CURRENT (A) o ID, DRAIN CURRENT (A) 120 90 VGS = 4.5 V 10 1 ms 10 ms 100 ms 1s 10s DC 1 60 30 Limited by Package THIS AREA IS LIMITED BY rDS(on) 0.1 SINGLE PULSE TJ = MAX RATED RJA = 120 oC/W TA = 25 oC 0 25 50 75 100 o 125 150 0.01 0.01 0.1 1 10 100 200 TC, CASE TEMPERATURE ( C) VDS, DRAIN to SOURCE VOLTAGE (V) Figure 21. Maximun Continuous Drain Current vs Case Temperature 1000 P(PK), PEAK TRANSIENT POWER (W) Figure 22. Forward Bias Safe Operating Area SINGLE PULSE RJA = 120 C/W o o 100 TA = 25 C 10 1 0.5 -3 10 10 -2 10 -1 1 t, PULSE WIDTH (s) 10 100 1000 Figure 23. Single Pulse Maximum Power Dissipation (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 8 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (Q2 N_Channel) TJ = 25 oC unless otherwise noted 2 1 NORMALIZED THERMAL IMPEDANCE, ZJA DUTY CYCLE-DESCENDING ORDER 0.1 D = 0.5 0.2 0.1 0.05 0.02 0.01 PDM t1 0.01 SINGLE PULSE RJA = 120 C/W (Note 1d) o t2 NOTES: DUTY FACTOR: D = t1/t2 PEAK TJ = PDM x ZJA x RJA + TA 0.001 -3 10 10 -2 10 -1 1 10 100 1000 t, RECTANGULAR PULSE DURATION (sec) Figure24. Junction-to-Ambient Transient Thermal Response Curve (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 9 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Typical Characteristics (continued) SyncFET Schottky body diode Characteristics Fairchild's SyncFET process embeds a Schottky diode in parallel with PowerTrench MOSFET. This diode exhibits similar characteristics to a discrete external Schottky diode in parallel with a MOSFET. Figure 25 shows the reverse recovery characteristic of the FDMS7600AS. Schottky barrier diodes exhibit significant leakage at high temperature and high reverse voltage. This will increase the power in the device. IDSS, REVERSE LEAKAGE CURRENT (A) 15 10 10 10 10 10 10 -1 -2 TJ = 125 oC 10 CURRENT (A) didt = 300 A/s -3 TJ = 100 oC 5 -4 0 -5 TJ = 25 oC -5 150 -6 200 TIME (ns) 250 300 0 5 10 15 20 25 30 VDS, REVERSE VOLTAGE (V) Figure 25. FDMS7600AS SyncFET body diode reverse recovery characteristic Figure 26. SyncFET body diode reverse leakage versus drain-source voltage (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 10 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET Dimensional Outline and Pad Layout (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 11 www.fairchildsemi.com FDMS7600AS Dual N-Channel PowerTrench(R) MOSFET TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended to be an exhaustive list of all such trademarks. AccuPowerTM PowerTrench(R) FPSTM The Power Franchise(R) Auto-SPMTM F-PFSTM PowerXSTM (R) Build it NowTM FRFET(R) Programmable Active DroopTM CorePLUSTM Global Power ResourceSM QFET(R) TinyBoostTM Green FPSTM QSTM CorePOWERTM TinyBuckTM Green FPSTM e-SeriesTM Quiet SeriesTM CROSSVOLTTM TinyCalcTM GmaxTM RapidConfigureTM CTLTM TinyLogic(R) Current Transfer LogicTM GTOTM TINYOPTOTM EcoSPARK(R) IntelliMAXTM TM TinyPowerTM EfficentMaxTM Saving our world, 1mW /W /kW at a timeTM ISOPLANARTM TinyPWMTM EZSWITCHTM* SmartMaxTM MegaBuckTM TinyWireTM TM* SMART STARTTM MICROCOUPLERTM TriFault DetectTM SPM(R) MicroFETTM TRUECURRENTTM* STEALTHTM MicroPakTM (R) SuperFETTM MillerDriveTM (R) Fairchild SuperSOTTM-3 MotionMaxTM Fairchild Semiconductor(R) SuperSOTTM-6 UHC(R) Motion-SPMTM FACT Quiet SeriesTM Ultra FRFETTM SuperSOTTM-8 OPTOLOGIC(R) (R) FACT OPTOPLANAR(R) UniFETTM SupreMOSTM (R) (R) FAST VCXTM SyncFETTM FastvCoreTM VisualMaxTM Sync-LockTM FETBenchTM XSTM (R)* PDP SPMTM (R) FlashWriter * Power-SPMTM tm tm tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION, OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS. THESE SPECIFICATIONS DO NOT EXPAND THE TERMS OF FAIRCHILD'S WORLDWIDE TERMS AND CONDITIONS, SPECIFICALLY THE WARRANTY THEREIN, WHICH COVERS THESE PRODUCTS. LIFE SUPPORT POLICY FAIRCHILD'S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR CORPORATION. As used herein: 1. Life support devices or systems are devices or systems which, (a) are intended for surgical implant into the body or (b) support or sustain life, and (c) whose failure to perform when properly used in accordance with instructions for use provided in the labeling, can be reasonably expected to result in a significant injury of the user. 2. A critical component in any component of a life support, device, or system whose failure to perform can be reasonably expected to cause the failure of the life support device or system, or to affect its safety or effectiveness. ANTI-COUNTERFEITING POLICY Fairchild Semiconductor Corporation's Anti-Counterfeiting Policy. Fairchild's Anti-Counterfeiting Policy is also stated on our external website, www.Fairchildsemi.com, under Sales Support. Counterfeiting of semiconductor parts is a growing problem in the industry. All manufactures of semiconductor products are experiencing counterfeiting of their parts. Customers who inadvertently purchase counterfeit parts experience many problems such as loss of brand reputation, substandard performance, failed application, and increased cost of production and manufacturing delays. Fairchild is taking strong measures to protect ourselves and our customers from the proliferation of counterfeit parts. Fairchild strongly encourages customers to purchase Fairchild parts either directly from Fairchild or from Authorized Fairchild Distributors who are listed by country on our web page cited above. Products customers buy either from Fairchild directly or from Authorized Fairchild Distributors are genuine parts, have full traceability, meet Fairchild's quality standards for handing and storage and provide access to Fairchild's full range of up-to-date technical and product information. Fairchild and our Authorized Distributors will stand behind all warranties and will appropriately address and warranty issues that may arise. Fairchild will not provide any warranty coverage or other assistance for parts bought from Unauthorized Sources. Fairchild is committed to combat this global problem and encourage our customers to do their part in stopping this practice by buying direct or from authorized distributors. PRODUCT STATUS DEFINITIONS Definition of Terms Datasheet Identification Advance Information Product Status Formative / In Design Definition Datasheet contains the design specifications for product development. Specifications may change in any manner without notice. Datasheet contains preliminary data; supplementary data will be published at a later date. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve design. Datasheet contains final specifications. Fairchild Semiconductor reserves the right to make changes at any time without notice to improve the design. Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I41 Preliminary First Production No Identification Needed Obsolete Full Production Not In Production (c)2009 Fairchild Semiconductor Corporation FDMS7600AS Rev.C 12 www.fairchildsemi.com |
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